Memory Design Engineer

Intel
Hillsboro, OR 97123
  • Job Code
    JR0166377
Job Description

You will be part of the Corporate Memory Organization memory compiler team and will own significant engineering tasks in a fast-paced and technically challenging environment.

Responsibilities:

Responsibilities would include but are not limited to:

  • Provide design solutions for meeting challenging memory design specs for various product segments
  • Memory Compiler Design Flow Methodology development
  • Design validation and characterization of Memory Compilers
  • Interfacing with customers

Traits:

Behavioral traits for this position include logical thinking, good verbal and written communication, interpersonal skills, teamwork, ability to prioritize work, multitask, good analytical and problem solving skills.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work, classes, research, and/or relevant previous job and/or internship experiences.

Minimum Qualifications:

The candidate must possess a Bachelor's degree in Electrical Engineering or Computer Engineering with 3+ years of experience OR a Master's degree in Electrical Engineering or Computer Engineering with 1+ years of experience or a PhD in Electrical Engineering or Computer Engineering. Qualifying work experience requirement above must be in:

  • VLSI or VLSI Design
  • SRAM or Register File
  • Timing analysis or characterization or timing simulations

Preferred Qualifications:

  • Experience with transistor level operation, memory bit cell design, design challenges under process variations, and low power circuit techniques
  • Experience in memory design convergence tools including formal equivalence verification, static timing methodology, electrical reliability or robustness analysis
  • Experience with scripting Perl tcl etc to develop a memory compiler and support or enhance the tool as required

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Memory Design Engineer

Intel
Hillsboro, OR 97123

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