Manufacturing Product Development Yield Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0198836
Job Description

Job Description:

In this role you will be responsible for identifying, investigating, and implementing solution of product related yield and PHI (product-health-indicator) limiters

  • The MPE Yield engineer will ensure the testability and manufacturability of Intel Data Center products from Pre-Silicon stage through production ramp with specific emphasis on yield analysis to meet both quality and cost requirement

  • Investigate and debug complex test and Si material related yield issues

  • Analyze and evaluate component performance to ensure optimal match of component requirements with production equipment capability

  • Come up with innovative solutions. Define the backend product yield roadmap and follow through with execution per project milestones


Although the key focus areas of this position involve investigating product yield issues, identifying root-cause and delivering solutions, MPE Yield engineer also works closely with a wide range of partners and stakeholders across Intel, including Product Development, Process Development, Design, Architecture, Sort, Test Equipment engineers, labs and Manufacturing teams in order to deliver a high-quality technology for HVM ( High Volume Manufacturing ).

Additional responsibilities and qualifications include but are not limited to:

  • Demonstrate strong abilities in data collection and analysis

  • Apply engineering application tools (JMP, SQL python, etc.) to perform data analysis and solve complex problems

  • Establish and deliver yield improvement roadmaps

  • Have in-depth knowledge of Intel Testing methodology and HVM testing environment

  • Partner with test content owners to analyze and resolve yield limiters

  • Work closely with FSM (Fab SORT Manufacturing) and TD on incoming materials quality indicators, test conditions and yield correlation to backend

  • Collaborate with business groups and cross-site partners (e.g. ATD, Fab, ATM, Design) to accomplish high quality and cost-effective Yield goals for HVM

  • Innovative thinking and leading cross teams debug working groups are critical as well


NOTE: Primary work location for this position is Santa Clara, CA


Qualifications

Qualifications:
Candidate must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates

Minimum qualifications:

Bachelor's degree in Electrical Engineering, Computer Science or Computer Engineering or related engineering discipline and 4+ years of relevant work experience; OR Master's degree in  Electrical Engineering, Computer Science or Computer Engineering or related engineering discipline and 3+ years of relevant work experience in the following:

  • Yield analysis

  • Data analysis (JMP, SQL, Python, etc.)

  • Semiconductor Manufacturing process


Preferred Qualifications:
Experience in:

  • Intel Process Technology

  • Manufacturing testing (ATE, debugging)

  • Semiconductor device physics

  • Model based problem solving

Inside this Business Group

Manufacturing and Product Engineering (MPE) is responsible for test development across product segments, supporting 95% of Intel's revenue. We deliver comprehensive pre-production test suites and component/physical debug capabilities to enable high quality, high volume manufacturing.



Other Locations

US, Oregon, Hillsboro;US, Texas, Austin


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Manufacturing Product Development Yield Engineer

Intel
Santa Clara, CA 95050

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