Logic Design Lead

Intel
San Jose, CA 95113
  • Job Code
    JR0198713
Job Description

Come and join us, Intel is seeking highly qualified candidates to join BXD (Barefoot Switching Division) in our Network Edge group(NEX) as a Full chip integration lead. You will be joining a close-knit team responsible for building the world's leading fully programmable data plane based Ethernet switches. Our organization works on all levels of ASIC development, starting from high-level architecture to low-level circuit design and high-volume manufacturing.


As a Full chip integration Lead you will:

Use your knowledge of IP specifications and full chip development experience to integrate the components required to build an industry leading IO chip-let solution for complex networking ASICs. Responsibilities will include developing micro-architecture specifications, RTL implementation, Chip verification, timing convergence, ECO implementation, reviews, LINT and CDC and power analysis.

The ideal candidate should exhibit the following behavioral traits:
* Strong analytical ability, problem solving and communication skills.
* Willing to work independently and at various levels of abstraction.
* Versatility in coordinating the execution of complex team tasks.


Qualifications

Minimum Qualifications

* Bachelor's degree +6 years of experience or a Master's degree +6 years of experience in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.
* 6+ years of experience in System Verilog and Verilog based logic design.

Preferred Qualifications:
* PhD and 5 years of relevant experience. 
* Expertise in Networking Protocols. 
* A history in Ethernet MAC/PCS architecture and ethernet protocols.
* Knowledge with C++, Perl, Python and shell scripting. 
* Familiarity with UVM based Verification.

Inside this Business Group

The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Logic Design Lead

Intel
San Jose, CA 95113

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