Logic Design Engineer

Intel
Hillsboro, OR 97123
  • Job Code
    JR0182435
Job Description
Job Description

In this role, you will be part of the Design team working on the exciting next generation of a Power Management IP. You'll work with Micro-architects and Architects to implement logic functional units in RTL, collaborate with Verification engineers to validate the design and take the design through all the standard Design tools - synthesis/FEV (Formal Equivalence Verification)/CDC (Clock Domain Crossing Verification) and more to deliver a high quality design. You will also be involved in functional and power simulations bring up and debug.

Responsibilities:
In this role, the responsibilities may include but are not limited to:

  • Convert Architecture specification to Micro-architecture specification, implement logic functions in RTL using Verilog/System Verilog
  • Test design using formal verification tools and functional verification environment.
  • Qualify design to meet power, performance requirements using power simulation and static timing tools.
  • Work with Pre/Post-silicon verification teams to debug and root-cause RTL simulation/Silicon/FPGA failures.
  • Provide support to SOC customers for IP integration, debug support and timing convergence.
  • Write scripts to automate design tool flows as required to improve efficiency.


Qualifications

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:
The candidate must have earned a Bachelor's Degree in Electrical Engineering and/or Computer Engineering with 5+ years of industry experience -OR- Master's Degree in Electrical Engineering and/or Computer Engineering with 3+ years of industry experience -OR- PhD in Electrical Engineering and/or Computer Engineering with 1+ years of experience in:

  • Logic Design
  • RTL Design
  • Knowledge of Design Tools and Design Analysis such as Design Compiler, CDC (Clock Domain Crossing), Closing Timing Violations

Preferred Qualifications:

  • Formal Verification Tools,

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.



Other Locations

US, California, Santa Clara;US, Massachusetts, Hudson;US, Texas, Austin



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Logic Design Engineer

Intel
Hillsboro, OR 97123

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