Lead Emulation Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0177159
Job Description

Come join a creative team of engineers dedicated to designing the hardware technologies that network the leading cloud-service datacenters. We are the Barefoot Switching Division, BXD, inside Intel's Network and Edge group. We are looking for a motivated and astute individual to join our team as a Lead Emulation Engineer. You will be joining a collaborative team responsible for building the world's leading programmable Ethernet switches.

Our organization works on all levels of ASIC development, starting from high-level architecture to low-level circuit design and high-volume manufacturing. Our emulation engineers are responsible for building efficient and effective directed and constrained-random emulation environments that exercise designs through their corner-cases and demonstrate conformance to specifications.

They are also responsible for bringing up driver software in emulator. They use their analytic and waveform analysis skills, strong knowledge of digital design, understanding of object-oriented programming, and detailed understanding of IEEE and IETF specifications to verify large networking ASICs comprised of tens of billions of transistors.

You will be responsible for development of emulator environments, developing test plans, coverage plans and test-plan execution.

The ideal candidate should exhibit the following behavioral traits:

  • Detail oriented problem solving and communication skills.
  • Work independently and at various levels of abstraction.
  • Thoughtful and perceptive analytical ability.
  • A genuine curiosity for understanding the system.
  • Dedicated, committed to creative problem solving and assuming responsibility.


Qualifications

Minimum Qualifications:

  • BS, MS, PhD Degree in Electrical Engineering, Computer Engineering, Computer Science or related degree
  • 6 years+ of experience in building emulation models for large scale designs
  • 6 years+ of experience in developing test-bench writing tests and debugging in emulation environment
  • 6 years+ of experience in optimizing model for area and performance


Preferred qualifications from work or academic studies:

  • 12+ years of experience in validation of Ethernet Switches
  • Experience in validating 8023 and 8021 specifications
  • Experience with IETF RFCs and datacenter network architecture
  • Experience in TCL, Perl, Python
  • Experience in System Verilog
  • Experience in design verification with SVA methodology
  • Experience with supporting post-silicon debug on the emulator
  • Experience in debugging driver level software

Inside this Business Group

The Data Center Group (DCG) is at the heart of Intels transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Lead Emulation Engineer

Intel
Santa Clara, CA 95050

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