IP Structural Design Engineer

Intel
Hillsboro, OR 97123
  • Job Code
    JR0177574
Job Description

Intel's IP group is looking for an experienced Physical Design Engineer to contribute in the high performance power solutions IP space. We are designing innovative IP solutions across multiple technologies and unique architectures that fuels Intel's servers, clients and graphics microprocessors. You will collaborate with architects, logic designers, and analog engineers in evaluating implementation details of complex design features. You will perform all aspects of the SoC design flow from high-level design through synthesis, place and route, timing analysis and power reduction.

Responsibilities will include but not limited to:

  • Creating a design database that has completed sign-off flows and is ready for manufacturing.
  • DFX IP Family(VDM/ODI) and/or block-level floor planning,
  • Power supply and power grid planning and analysis,
  • Logic synthesis of design blocks,
  • Formal Equivalence Verification (FEV),
  • Clocking network planning and analysis,
  • Auto Place-and-Route (APR) using Synopsys ICC tools,
  • Timing verification using Synopsys Prime Time,
  • Physical verification - Layout vs. Schematic (LVS),
  • Design Rule Checks (DRC),
  • Electrical Rule Checks (ERC), and Design for Manufacturability checks (DFM), Reliability Verification,
  • Debug and resolution of integration issues at parent level, Completion of design reviews and design signoff flows,
  • Assist in the preparation of the full-chip layout design database for introduction to manufacturing.

In addition to the qualifications listed below the ideal candidate will also have:

  • Excellent analytical and problem-solving skills,
  • Strong verbal/written communication skills,
  • Effective team player with continuous learning mindset,
  • Willingness to balance multiple tasks,
  • Willingness to work in a fast-paced environment and have as much fun and growth as possible in the process.
  • The group is looking for someone who can balance innovation with flawless execution.H


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
Candidate must have a Bachelor's degree in Computer science/Electrical or Computer Engineering with 4+ years of experience -OR- a Master's degree in Computer science/Electrical or Computer Engineering with 3+ years of experience
in:

  • Analog mixed signal circuit design


Preferred Qualifications

  • VLSI circuits, design techniques, and sub-micron CMOS technologies
  • Designing high-speed, low-power digital circuits, floor planning, timing convergence and layout verification
  • Logic synthesis and automated place and route tools
  • Computer architecture and logic design fundamentals
  • Hardware description languages such as Verilog or System Verilog
  • Scripting skills using a programming language such as Perl, TCL, or Python

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.



Other Locations

US, Massachusetts, Hudson



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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IP Structural Design Engineer

Intel
Hillsboro, OR 97123

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