IP Logic Design Engineer

Intel
Hudson, MA 01749
  • Job Code
    JR0190321
Job Description

The world is transforming and so is Intel!  Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower peoples digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, Come join us to do something wonderful!

Intel's Intelligent Property Design Group(IPG) is looking for an Experienced IP logic Design Engineer to contribute to the high-performance power delivery/Voltage Regulator IP space for Intel's client/server/graphics SOC/SOP designs.

Your responsibilities will include but are not limited to-

  • Collaborating with cross-discipline stakeholders in defining micro-architecture, implementing RTL and analog behavior model in System Verilog, validating the design through quality checks, supporting synthesis, timing closure, and post-silicon.
  • You will also have an opportunity to work on a high-level understanding of the architecture and transistor-level analog circuit implementation
  • You will contribute to specifications at multiple levels, including the HAS and MAS (microarchitecture spec).
  • You must be able to balance design trade-offs with modularity, scalability, DFX requirements, chassis compliance, power, area, and performance.
  • You will provide IP integration support to SOC customers and represent RTL and the IP team.
  • You will mentor and train junior engineers in the IP team from different disciplines and provide support to IP integration at SOC level.

The ideal candidate should exhibit behavioral traits that indicate:

  • Excellent written and verbal communication skills are critical in a fast-moving team.
  • As part of a growing, dynamic team, the candidate must be successful working with a small team and manage multiple tasks and changing requirements, in an innovative environment.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Candidate must have a Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 4+ years of experience - OR - Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 2+ years of experience in:

  • Computer architecture and pipelining, including major CPU subsystems.
  • RTL Verilog or SystemVerilog with a working knowledge of hardware modeling issues and logic debug environments
  • Modern energy-efficient/low-power logic design techniques, including those specifically applicable to multi-power domain optimization
  • Modern IP/SOC logic design flows such as GK, VCS, CDC, UPF, etc.
  • TAP Controller and DFX
  • Customer support and debug for IP integration at SOC level
  • Synthesis and speed path debug
  • Industry-standard circuit design tools, including schematic capture, logic synthesis, place and route, static timing analysis and design closure
  • Scripting in Perl, Python, Ruby, TCL, or some other scripting language.
  • Able to lead small workgroup to complete mega tasks at IP or SOC level.

Preferred Qualifications:

  • Analog mixed-signal circuit design experience

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.



Other Locations

US, California, Santa Clara;US, Oregon, Hillsboro


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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IP Logic Design Engineer

Intel
Hudson, MA 01749

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