IP Design Engineer for External Memory and Chip-to-Chip Interfaces

San Jose, CA 95113
  • Job Code
Job Description

Intel's Programmable Solutions Group (PSG) Custom IP Solutions Engineering (CISE) team develops comprehensive solutions to provide customers easy and efficient access to the capabilities of Intel's FPGA devices. These solutions are provided as highly configurable intellectual property (IP) cores that are fully integrated with Intel PSG's software CAD tool, Quartus Prime. External Memory Interface IP (EMIF) is one category of important IP Cores. Most customer applications require storage or buffering of large amounts of memory. Thus, Memory Interface IP for DDR4, DDR5, High-Bandwidth Memory (HBM) or Intel Optane Memory becomes a critical component of most electronic systems. Another class of IP cores we build are for customized chip-to-chip interfaces. Intel PSG's IP cores provide configurable access to these high-speed, high-bandwidth memory devices and chip-to-chip interfaces. The constantly rising speed and complexity of memory devices and other chip-to-chip interfaces presents a challenging design problem that requires system-level knowledge of silicon, software, IP, and customer applications.

As an IP Design Engineer, you will work with a team of engineers to develop and verify state-of-the-art Memory Interface or chip-to-chip IP cores. You will be working on advanced device architectures, design definition, implementation, and verification. You will also be developing design examples and simulation models, accompanied by a rich set of technical documentation. Your specific responsibilities will include, but are not limited to the following:

  • Architecture and Design based on latest memory protocol specifications or custom chip-to-chip interfaces

  • Block level RTL development and SoC Level IPs integration

  • Static Timing Analysis and Timing Closure

  • Device support and CAD tool integration

  • Verification (e.g., verification IP, methodologies, frameworks, bus functional models, regression tests)

  • Hardware power-on and system debug

  • New product release and rollout support

  • Customer technical support

The candidate should possess the following behavioral traits:

  • Strong skills in communication, initiative, innovation, and teamwork

  • Highly motivated to learn and adapt to fast-changing technologies and environments

  • Excellent problem-solving skills and attention to detail

  • Demonstrate fundamental values such as accountability, integrity, and a winning mindset


Experience listed below would be obtained through a combination of your schoolwork, classes, research, relevant job and/or internship experiences. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.


Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.

Minimum Qualifications

3+ years of total experience inclusive of the following:

  • RTL design with Verilog and/or VHDL

  • Software programming and/or scripting languages

Preferred Qualifications

Experience in one (or more) of the following:

  • 7+ years of experience RTL design with Verilog and/or VHDL

  • Experience with External Memory Interface protocols

  • Experience with System Integration

  • Experience with PCI Express Protocol

  • Experience with Computer or System Architecture

  • Experience in defining and implementing verification functional coverage

  • Experience with FPGA Design and/or Timing Closure

  • Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Before you go...

Our free job seeker tools include alerts for new jobs, saving your favorites, optimized job matching, and more! Just enter your email below.

Share this job:

IP Design Engineer for External Memory and Chip-to-Chip Interfaces

San Jose, CA 95113

Join us to start saving your Favorite Jobs!

Sign In Create Account