FPGA HDL Simulation Model Development and Verification Engineer

Intel
San Jose, CA 95113
  • Job Code
    JR0177819
Job Description

FPGA Engineers within the Programmable Solutions Group (PSG) research, design, develop, and optimize various aspects of flows, models, tools, and runtimes that are closely coupled to FPGA silicon, IP, and boards while leveraging strong knowledge of hardware logic design, board design, semiconductor devices, and chip layout. We get to design, develop, and optimize hardware and software abstractions for acceleration with the FPGA.

As a FPGA HDL Simulation Model Development and Verification Engineer you will bring your computer architecture/logic design experience to develop and maintain simulation models with Quartus Software tool that programs the current, and, next generation of FPGA devices. Your scope of responsibilities will include, but are not limited to, developing cycle accurate simulation, support for high-speed transceivers, and other peripheral components. You will also be helping customers debug issues in their simulation testbenches.


Qualifications

Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.


Education
Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Minimum Qualifications

3+ years of experience with Bachelor's Degree or Master's Degree with projects or coursework in:

  • Experience using VHDL, Verilog, and/or /SystemVerilog

  • Experience using industry standard HDL simulation tools (e.g. VCS/VCSMX, MODELSIM/QUESTASIM, NCSIM/XCELIUM, or ALDEC Riviera)


Preferred Qualifications

  • 2+ years of experience using scripting languages (e.g. Python, TCL, PERL, BASH)

  • Experience with ASIC verification tools and methodologies (e.g. UVM)

  • Experience with FPGA design tools (eg. Vivado, Quartus)

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.



Other Locations

US, Arizona, Phoenix;US, California, Santa Clara



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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FPGA HDL Simulation Model Development and Verification Engineer

Intel
San Jose, CA 95113

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