FPGA Engineering Manager

Intel
Hillsboro, OR 97123
  • Job Code
    JR0176594
Job Description

As a member of the Pre-Silicon Hardware, Networking and Xeon (PHNX) organization, you will be critical to the future success of Intel's SoC products by delivering the highest quality in our products. You will join a fast-paced, exciting, innovative environment leading an engineering team in Oregon. You will work on Intel SoC development projects through strategic partnerships with our global Architecture, Pre-Silicon, Post-Silicon teams as well as external customers in the Client, Data Center and Discrete Graphics segments. You will do this by providing Pre-Silicon Platforms throughout the product life cycle for software development, HW/SW co-validation, power/performance tuning of products at the right velocity.


Our FPGA and Integration team is a product execution team that delivers Pre-Silicon Platforms including: Simulation, FPGA, Emulation, and Hybrid Virtual platforms. These Pre-Silicon Platforms are critical to enabling SW/HW co-design and accelerate time to market for our SoC Products.


The team's primary responsibilities include: prototyping and emulation activities such as synthesis, FPGA prototyping modeling, validation collateral development (synthesizeable BFMs, protocol transactors, debug trackers, etc), logic design with Verilog, System Verilog, SW development with C/C++, SystemC, Python, Perl, and Pre-Silicon validation at the IP, Subsystem, Die, Platform levels.


We are seeking a passionate, energetic and strong candidate to lead the FPGA and Integration team in Oregon (FIT Oregon). You will lead a multi-domain team of HW and SW engineers who will primarily deliver FPGA Prototyping platforms that enable a variety of use cases including pre-silicon software development, system level power & performance exploration, architecture exploration, functional verification and validation.


As part of the PHNX FIT, we also invest in enabling forward looking FPGA and Emulation technologies, industry standards, and key infrastructure components development as well as managing EDA vendor relationships. Most of our development effort is in System Verilog, C/C++, and Python programming languages on Windows and Linux environments.

PHNX FIT is a highly exciting and challenging environment. We are exposed to broad scope of mission critical SoC challenges and are looking for qualified engineers with several soft skills including:

  • Demonstrated track record of leading a team and timely delivery of projects and products across multiple sites.
  • Skilled at leading projects, delegating tasks and motivating engineers.
  • Excellent communication and presentation skills.
  • Can work independently, prioritize, manage risks, evaluate tradeoffs, make quick decisions and communicate project status.
  • Can interface with multiple customers, understanding their requirements, setting expectations and delivering on commitments.
  • Can work with hardware and software teams developing advanced technologies using design and SW best practices
  • Analytical problem solving, team oriented and skilled at working in a collaborative environment
  • Drives strategic Electronic Design Automation (EDA) initiatives.
  • Acts as ambassador for new technologies and solutions and actively engage with global cross-site teams.
  • Can communicate effectively with various global technical groups and to coordinate activities amongst those groups.


Qualifications

Minimum Requirements

Candidate must have a Bachelors in Electrical/Computer Engineering or Computer Science and and 9+ years of work experience - OR - a Masters/PhD degree in Electrical/Computer Engineering or Computer Science and 7+ years of work experience

7+ years of experience in:

  • SoC logic design and simulation verification

4+ years of experience with:

  • FPGA prototyping solutions using Synopsys HAPS boards, Siemens Prodesign, Cadence Protium or custom prototyping platforms
  • FPGA synthesis tools - Synopsys, Synplify Pro, Synplify Premier, Siemens, Quartus.

3+ years of experience with:

  • logic/RTL design- VHDL, Verilog, System Verilog.

2+ years of experience with:

  • FPGA debug tools - Chipscope, Identify, Certus
  • S/W development practices and quality standards
  • Linux/Unix and Windows based S/W development environments and tools
  • HDL (Verilog, System Verilog) based simulation and RTL validation environments



Preferred Qualifications

Experience in/with:

  • Hardware emulation platforms such as Synopsys' ZeBu, Siemens' Strato and Cadence's Palladium platforms
  • Intel SoC (Processor, Graphics, Memory, Peripheral) architecture
  • Peripheral protocols (e.g. PCIE, USB, Audio, etc)
  • Power-aware Pre-Si modeling
  • Transaction level modeling
  • OVM/UVM and other object-oriented verification methodologies
  • Developing and debugging of issues in drivers, FW, BIOS and OS environments
  • Embedded software development/debug
  • Python, Perl or Shell scripting
  • Leading Agile SW development practices - Kanban, Scrum, etc.

Inside this Business Group

The Design Engineering Group is a worldwide team responsible for the design, development, validation, and manufacturing of IPs and SOCs. Our mission is to deliver leadership products through groundbreaking innovations.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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FPGA Engineering Manager

Intel
Hillsboro, OR 97123

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