FPGA Design and Validation Engineer

Santa Clara, CA 95050
  • Job Code
Job Description

Responsibilities of the role include, although not limited to:

  • Creates emulation Field Programmable Gate Array FPGA models from a Register Transfer Level RTL design using emulation FPGA synthesis partitioning and routing tools
  • Defines and documents RTL changes required for emulation FPGA
  • Develops hardware and software collaterals and integrates it with the emulation FPGA model Tests and debugs the emulation FPGA model and collaterals
  • Defines and develops new capabilities HWSW tools to enable acceleration of RTL and improve emulation FPGA model usability for pre-Silicon and post-Silicon functional validation as well as SW development validation
  • Develops improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform
  • Interfaces with and provides guidance to pre-silicon Validation teams for optimizing pre-Si validation environments test suites and methodologies for emulation efficiency
  • Develops and applies automation aids flows and scripts in support of emulation ease-of-use and improvement of equipment utilization


Minimum Qualifications

Candidate must have a Bachelors degree in Electrical Engineering and 5+ years of related work experience - OR - a Masters degree in Electrical Engineering and 3+ years of related work experience

2+ years of experience in:

  • FPGA RTL design Prototyping Synthesis Place and Route Timing
  • FPGA debug and methodology
  • Tools Synopsys Protocompiler Xilinx Vivado Quartus VCS Verdi
  • Verification methodology and functional verification
  • Verilog system/ verilog
  • Scripting Perl, Python and CC

Inside this Business Group

The everyday contributions of the Intel Validation Engineering (iVE) team are essential to retaining/regaining Intel's product leadership. We validate, debug, and tune the newest designs and world-changing technologies that enrich the lives of every person on earth. We play a critical role in completing the PRQs of Intel products and in Intel's ability to deliver the annual technology platforms in our roadmap.

Other Locations

US, California, Folsom

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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FPGA Design and Validation Engineer

Santa Clara, CA 95050

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