Engineering Lead System Level FPGA Debug

San Jose, CA 95113
  • Job Code
Job Description

The Programmable Solutions Group (PSG) is a world-class research and development site. Our staff, acknowledged as among the world's leading experts, create state-of-the-art CAD software tools and industry-leading programmable logic device architectures. Intel San Jose's research and development facility employ some of the most accomplished technologists and we offer among the best compensation packages in the industry.

We are looking for accomplished engineers who are passionate about delivering high-quality products that result in an outstanding customer experience. You will be a lead engineer for debug solutions to provide our customers the means to quickly find functional issues as well as performance bottlenecks.

The team you will be part of will research, design, develop, and optimize software tools that enable the use of Field Programmable Gate Arrays. You will develop flows, tools, and software runtimes that are closely coupled to FPGA silicon, IP, and boards while leveraging strong knowledge of FPGA hardware. You will have to proactively reach out and partner with both internal and external customers/clients.


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.


  • The candidate must possess a Bachelor's or a Master's Degree in Computer Science, Engineering, or related field of study.

Minimum Qualifications:     

  • 6 + years of experience in C++/C, Java, or Python       

  • 5+ years of experience in designing products from conception to completion

  • 5+ years of hands-on experience with FPGA design and implementation, and debug

Preferred Qualifications:

  • System-level design and validation

  • Experience in agile development processes

  • Experience working in global teams.

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Other Locations

US, California, Santa Clara;US, Colorado, Fort Collins

Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here

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Engineering Lead System Level FPGA Debug

San Jose, CA 95113

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