Digital Design Engineer for the Mixed Signal Design Team

Intel
San Jose, CA 95113
  • Job Code
    JR0179603
Job Description

The mission of Intels Programmable Solutions Group (PSG) is to drive the future for FPGAs and Structured ASICs technology/solutions around the globe.

Within the Mixed Signal Design Team, youll be surrounded by some of the brightest minds/engineers in the world as we are responsible for the analog circuits and digital logic design for a group which is responsible for building custom analog circuits, PLL, IO, clock generation circuits, etc. on Intel FPGAs

As a Digital Design Engineer, you will be responsible for...

  • Behavioral modeling and validation for analog circuits (PLL, DLL, IO, ADC, clock generation circuits, etc.)

  • RTL design and verification of counters, dividers, state machines, control logic, etc.

  • Static timing constraint generation and analysis/signoff

  • Mixed-signal simulations

  • Run formal checks such as UPF and logic equivalence checking

  • RTL design and verification flow development

  • Design documentation


Qualifications

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Education

Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Minimum Qualifications

3+ years of total experience

  • Experience within the ASIC (or related) design flow

  • Verilog/SystemVerilog and simulators (e.g. VCS, ModelSim, etc.)

  • Scripting (e.g. TCL, Python, etc.)

Preferred Qualifications

  • Experience with analog/analog IC design methods

  • Experience with VerilogAMS

  • Experience of PLL, DLL, SerDes, DDR, ADC

  • Synthesis, STA, Lint checkers, Clock domain crossing (CDC) checkers, Logic equivalence checking

  • Master's in Electrical Engineering or related field of study

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.



Other Locations

US, California, Santa Clara;US, Oregon, Hillsboro;US, Texas, Austin



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Digital Design Engineer for the Mixed Signal Design Team

Intel
San Jose, CA 95113

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