DFT Validation Engineer

Intel
Hudson, MA 01749
  • Job Code
    JR0174565
Job Description

The world is transforming and so is Intel!  Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower peoples digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, Come join us to do something wonderful!


As a DFT/DFx Verification Engineer you will be responsible for driving and execution of DFx verification flow and implementations at block level and full chip level. The successful candidate will contribute to achieving high DFT quality across IPs and SoCs to achieve low DPPM (Defective Parts per Million) through DFT network validation in large complex IPs or SoCs.

Your responsibilities will include but not limited to:

  • Work closely with cross functional teams in understanding the DFT architecture and planning the verification tasks for the entire DV team.
  • Work with the digital design teams on understanding design in context of DFx implementations. Work with Post-si validation and design team to establish requirements for DFD (Design for Debug).
  • Work with DFx verification team to initiate DFx TFM (Tools, flows, methodologies)
  • Develop new scripts/flows to improve DFx verification
  • Establish DFx simulation environment including new techniques and methods, and validate the DFx designs
  • Generate and deliver the test simulation environment for downstream partners such as manufacturing teams.
  • Be a good team player with excellent interpersonal and communication skills to work with cross-functional partners and core-team/PDT


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.


Minimum Qualifications:

Candidate must have a Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 3+ years of experience - OR - Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 2+ years of experience in:

  • Pre/Post Si DFT/DFx experience (insertion, verification, coverage, debug, production test vector generation).
  • MBIST architecture, JTAG, and/or Boundary scan verification using CAD Tools
  • Working with verification environment on simulation or emulation flows and familiarity with industry standard verification methodologies

Preferred Qualifications:

  • Experience with design integration process.
  • Experience with firmware and/or Physical Design (DFx impact)
  • Experience with multi-team, global multi-site working environment






 

Inside this Business Group

Xeon Performance Group (XPG) delivers custom server SoC design solutions to our data center customers. It is chartered to deliver data centric silicon that is high-performing, cost-effective, high-quality, and on schedule in way that increases market share and drives the best solutions for our customers.



Other Locations

US, California, Santa Clara



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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DFT Validation Engineer

Intel
Hudson, MA 01749

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