Device Modeling Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0138433
Job Description

PTD Module Engineers are responsible for leading scientific research enabling manufacture of innovative device architectures coupled with the realization of these architectures. Designing, executing and analyzing experiments necessary to meet engineering specifications for their process. Participate in development of intellectual property. Development of the equipment necessary to exploit the understanding gained in research (in collaboration with equipment suppliers). Work effectively with the equipment supplier to identify shortcomings, propose and evaluate hardware modification to mitigate issues. Operate manufacturing line in order to integrate the many individual steps necessary for the manufacture of complex microprocessors. Insitu ramp to manufacturing volumes to demonstrate the technology meets requirements while simultaneously transferring the technology to counterparts in manufacturing via the Copy Exactly! Methodology. Install and qualify manufacturing capacity at the development site and audit installation/qualification and supervise first full loop at the production site. Must hold a PhD.

In addition the ideal candidate should demonstrate the following skills/traits:

  • Strong communication skills
  • Solid understanding of Aging Simulations and reliability methodologies and tools.


Qualifications

  • A PhD or Master's degree in electrical engineering or related discipline with at least 5 years+ of direct experience in CMOS, interconnect modeling and characterization
  • NVM (NAND/ Emerging memory) experience is strongly preferred but not required
  • Must have a strong background in semiconductor device physics, design and layout of structures for parametric extraction
  • Hands-on experience with device characterization techniques, relevant tools, and automated systems
  • Familiar with basic analog / digital circuit blocks and model interaction
  • Good knowledge of BSIM3/4 models, extraction tools and commercially available simulators (example: HSPICE, ELDO, Ultrasim, etc.).
  • Experience with various EDA tools/flows/architecture and be able to judge the relative merit of different tools
  • Demonstrated leadership skills in defining model development roadmap and aligning goals with the design/ TD requirements. Must have experience operating in a matrix environment with multiple priorities and deadlines.

Inside this Business Group

Non-Volatile Solutions Memory Group:  The Non-Volatile Memory Solutions Group is a worldwide organization that delivers NAND flash memory products for use in Solid State Drives (SSDs), portable memory storage devices, digital camera memory cards, and other devices.  The group is responsible for NVM technology design and development, complete Solid State Drive (SSD) system hardware and firmware development, as well as wafer and SSD manufacturing.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Device Modeling Engineer

Intel
Santa Clara, CA 95050

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