Datapath/IO Digital Design Engineer

San Jose, CA 95113
  • Job Code
Job Description

Barefoot Switching Division (BXD) is Intel's organization tasked with bringing best-in-class, programmable Ethernet switch product products to market. These solutions enable some of the largest datacenters in the world to function efficiently with the flexibility to respond to new challenges. Our work environment combines the resources of Intel with the fast-moving culture of a startup to deliver a unique value proposition. In this role, your daily activities at our growing division will be anything but repetitive. You will develop and evaluate semi-custom high-speed circuitry for both on-chip and chip-to-chip communication. You will advise on all aspects of semi-custom design, including architecture, micro-architecture, RTL design, timing, reliability, and execute parts of the designs yourself as part of a team including all aspects of silicon design expertise, from architects to physical designers. You will be expected to lead BXD's semi-custom design effort and will be expected to select the best tools for the job. You will further be expected to understand BXD's legacy tools for performing these tasks and evaluate and guide our division's future efforts. You will be interfacing with colleagues from all over Intel, such as customer-facing marketing engineers and quality and reliability engineering.


Education Requirement:

  • Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 9 years of industry work experience, or

  • Master's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 6 years of industry work experience, or

  • PhD in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 4 years of related work experience.

Minimum Qualifications

Combination of advanced course work or experience in:

  • 4 years of experience in Verilog, SystemVerilog, or VHDL

  • 3 years of experience in Lisp, C, Java, C++, Python or similar

  • 2 years of custom and semi-custom logic design

  • 2 years of circuit simulation (Hspice, nanosim, etc) of digital or mixed-signal circuits

  • 1 year of timing verification

Preferred qualifications

  • Experience in high-speed chip-to-chip protocols (such as DDR)

  • Experience in Computer architecture

  • Experience in Ethernet or networking

  • Experience implementing CAD tools for timing verification

  • Experience using datacenter job services (NQS/DQS/LSF, grid computing, HPC, etc.)

  • Experience working with advanced/non-traditional circuit timing methodologies (mesochronous, asynchronous, etc.)

Inside this Business Group

The Data Center Group (DCG) is at the heart of Intels transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world.

Other Locations

Virtual US and Canada

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here
Intel is committed to a culture of accessibility.  Intel provides accommodations to applicants and employees with disabilities.  Find information and request accommodation here

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Datapath/IO Digital Design Engineer

San Jose, CA 95113

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