Data Center DDR IP Product Owner

Santa Clara, CA 95050
  • Job Code
Job Description
Determines, specifies and evaluates the viability of complex hardware features and structures and ensures that software and hardware designs interface correctly. Designs framework for particular functions. Defines, documents and tests processes for inclusion into technical platforms, subsystem specifications, input/output and working parameters for hardware and/or software compatibility. Identifies, analyzes and resolves subsystem and/or SoC design weaknesses. Influences the shaping of future products by significantly contributing to the architecture used across design families. Provides multilayered technical expertise for next generation initiatives. Coordinate and track IP deliverables Ensure product quality is met and quality practices are followed Work with IP customers to align to IP roadmap Shepherd customer feature requests and escalations Capture IP feature requests in feature tracking tool (e.g., HSD or JIRA) Prioritize IP features to explore given IP team loading and customer needs Determine when an IP release is sealed to new features Deliver IP roadmap documentation and IP datasheet


Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: BSEE 17 years or MSEE 15 years. Arch experience in high performance memory protocols and architecture Preferred Qualifications: BSEE 19 years experience or MSEE with 17 years experience plus 15 years Intel experience. Arch experience in high performance memory protocols and architecture, working with spec, MIO, driving next gen memory roadmaps. Experience in server DDR product developments including arch, logic, validation and MSV.Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.

Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Data Center DDR IP Product Owner

Santa Clara, CA 95050

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