CPU Power RTL Micro-architect

Beaverton, OR 97005
  • Job Code
    200286533
  • Jobs Rated
    187th
Summary

Summary

Posted: Sep 9, 2021

Role Number:200286533

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experienc...Summary

Summary

Posted: Sep 9, 2021

Role Number:200286533

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product!

Apple's Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products! We are looking for an experienced technical leader to guide and direct world-class CPU power and clock management solutions.

Key Qualifications

  • Microarchitecture development and specification - from early high-level architectural exploration through microarchitectural research and arriving at a detailed specification
  • RTL ownership - development, assessment, and refinement of RTL design to target power, performance, area and timing goals
  • Design delivery - work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and power
  • Knowledge of Verilog and/or VHDL
  • Experience with simulators and waveform debugging tools

Description

As a member of the RTL and architecture team, the responsibilities would be in the refinement of solutions in the following areas:
Dynamic voltage and frequency scaling (DVFS/DVFM)
Power state definition and management
Dynamic clocking solutions
Micro-architecture strategies for improved power integrity
Debug solutions
Error handling
Reset control
Clock generation and asynchronous clock crossing strategies

Education & Experience

Bachelor's in Electrical or Computer Engineering is required.
Master's or PhD in Electrical or Computer Engineering is preferred.

Additional Requirements

Jobs Rated Reports for Architect

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CPU Power RTL Micro-architect

Apple, Inc.
Beaverton, OR 97005

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Architect
187th2019 - Architect
Overall Rating: 187/199
Median Salary: $79,380

Work Environment
Very Poor
190/220
Stress
Very High
204/220
Growth
Very Poor
183/220