CPU Core Synthesis and Physical Design Engineer

Hillsboro, OR 97123
  • Job Code
Job Description

Become a key member of a team participating in the design of Atom CPUs. We are looking for talented individuals to be part of a high performing team in the physical design of highly complex blocks from synthesis/APR through post-layout verification and tapeout.

We are looking for a talented individual to drive implementation of standard cell-based design (CBD) blocks from synthesis through post-layout verification and tapeout. You will develop the custom constraints for driving synthesis and Auto-Place and Route (APR) tools to implement and optimize the design. You will work closely with the micro-architecture, RTL and custom circuit teams to converge the design to project targets.

The ideal candidate should exhibit the following behavioral traits:

  • Problem-solving skills
  • Willingness to multitask
  • Strong written and verbal communication skills
  • Willingness to work in a dynamic and team oriented environment


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

The candidate must possess a Bachelors in Computer Engineering or Electrical Engineering with 4+ years of relevant work experience, or Masters in Computer Engineering or Electrical Engineering with 3+ years of relevant work experience or higher degree.

3+ years of experience in:

  • Experience with integrated circuit design tools (ex: Synopsys/Cadence), including logic synthesis, place and route, static timing analysis and design closure
  • PV convergence (including static timing and power analysis)
  • Chip physical design verification including formal equivalence, timing, electrical rules, DRC/LVS, Noise and electro-migration checks.
  • Scripting in an interpreted language, minimum TCL in addition to at least one other (e.g. Perl, Python, Ruby)
  • Demonstrated success in one or more of the following areas: Synthesis of a digital logic block, which was integrated into a large SoC or IP

Preferred Qualifications:

  • 3+ years of industry experience/exposure with CPU Micro-Architecture
  • Strong knowledge with Physical design best known practices concerning floor-planning, routing techniques, clock distribution
  • Strong knowledge of Static Timing Analysis, Noise analysis, and reliability verification techniques
  • Strong knowledge of RTL to GDS methodologies and formal equivalence
  • Familiar with Synopsys tool suite (DC, ICC2, PrimeTime)

Inside this Business Group

The Devices Development Group (DDG) is a global organization focused on the development and integration of SOCs, critical IPs including Atom and chipsets that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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CPU Core Synthesis and Physical Design Engineer

Hillsboro, OR 97123

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