Circuit Edit - Debug TD Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0177903
Job Description

Intel's Post Silicon Debug technology development team is responsible for next generation ion beam technology and circuit edit platform development. The Circuit Edit R&D Engineer's responsibilities include:

  • Execution of experiments for new generations of focused ion beam (FIB) platforms and ion beam technologies (e.g., Xenon Plasma FIB; Gallium FIB; Neon/Helium FIB)
  • Provide analytical support on ion beam machined samples, including SEM imaging, cross-section analysis, TEM / EDS analysis, and electrical characterization
  • Providing silicon debug support on Intel's leading-edge server and client products.


Additional responsibilities include, although not limited to:

  • Collaborating with the operation support team to develop and improve new circuit editing processes for the current and next-generation node
  • Working with circuit designers, component debug, platform validation engineering on direct write device modification and node access strategies
  • Working with process development engineers on developing best practices for ion beam machining for defect analysis.

In addition to the qualifications listed below, the ideal candidate will also have:

  • Good written and verbal skills, willing to create training and documentation
  • Willing to work both independently and collaboratively with teams across multiple organization and geographies


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly.

Minimum Qualifications:

The candidate must possess a Bachelors degree in Electrical Engineering, Computer Engineering, Chemical Engineering, Material Sciences or a related field with 1+ years experience -OR- a Masters degree in Electrical Engineering, Computer Engineering, Chemical Engineering, Material Sciences or a related field with experience in the following:

  • Background in device physics and circuit layout

NOTE: This position is not eligible for employment-based visa/immigration sponsorship for those with a Bachelors degree and less than 3 years of experience. Intel sponsors individuals for employment-based visas for positions where we experience a shortage of US Workers. These skills shortage roles are typically STEM contributing positions requiring a Master's or PhD degree, or a Bachelors degree with three years related job experience

Preferred Qualifications:

Experience in:

  • Semi-conductor process technology
  • Vacuum technology and electron / ion microscopy
  • TEM, EDS, SIMS, pico-probe station, and light optical microscope
  • Application development work


 

Inside this Business Group

The Design Engineering Group is a worldwide team responsible for the design, development, validation, and manufacturing of IPs and SOCs. Our mission is to deliver leadership products through groundbreaking innovations.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Circuit Edit - Debug TD Engineer

Intel
Santa Clara, CA 95050

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