Chipsets Logic Design Engineer

Folsom, CA 95630
  • Job Code
Job Description

Seize the opportunity to work with the team responsible for RTL logic design and microarchitecture of chipsets for PCs millions of people around the world will use. The Chipsets Logic Team, CLT is part of the Chipsets Silicon Group, CSG within Design Engineering Group, DEG and is responsible for developing soft IPs, subsystems and gaskets for client and server chipsets.

This job requisition is to seek an experienced, disciplined and collaborative RTL design engineer in Folsom, CA (Santa Clara and Chandler will also be considered).

As a Chipsets Logic Design Engineer, a typical day may include, but is not limited to:

  • Performing logic design, Register Transfer Level (RTL) coding, and formal verification
  • Participating in the development of Architecture and Microarchitecture specifications for the Logic components
  • Providing IP integration support to SoC customers and represents RTL team
  • Performing tools and flows to qualify the logic implemented, such as RTL/DFx linting, clock/reset domain crossing check, synthesizability check to meet design QoR, timing constraint definition and review, gate-count/power optimization, etc.
  • Develop automated tools or scripts for the RTL logic development or quality assurance

In addition to the qualifications listed below, the ideal candidate will also be:

  • An excellent communicator
  • Extremely organized
  • A team player who loves to collaborate
  • A strong technical leader who communicates well with great influencing skills
  • Passionate for design/tools and methodology
  • Someone who meets their commitments
  • Motivated
  • Self-driven
  • Someone who wants to make a difference through technology
  • Strong analysis and debugging skills
  • Creative in problem solving

We are:

  • Open to new ideas and methodologies
  • A collaborative team demonstrating the best teamwork across Intel
  • Here to help you succeed
  • People who want to do innovative things

If your skillsets align with our needs, we will provide you a great path to maximize your positive impact on the world.


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

The candidate must possess a Bachelor Degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or equivalent.

3+ years of experience in:

  • Pre-silicon verification/logic design experience
  • Pre-silicon verification/logic design experience with various tools and methodologies including but not limited to: System Verilog, Python/Perl/Shell scripting, power-aware simulation with VCS/Synopsys tools, RTL model build, design-for-test, design-for-verification.
  • Experienced in developing test plan and contents and coverage points for validation purpose based on High Level Architecture specifications
  • VLSI or Structural and Physical design flow/methodology experience
  • Power management, UFS, SPI, USB, PCI express or any industry standard BUS protocol experience will be advantage

Inside this Business Group

The Devices Development Group (DDG) is a global organization focused on the development and integration of SOCs, critical IPs including Atom and chipsets that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Other Locations

US, Arizona, Phoenix;US, California, Santa Clara

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Chipsets Logic Design Engineer

Folsom, CA 95630

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