CAD Research and Development Eng

Santa Clara, CA 95050
  • Job Code
Job Description

About the team:

Now is an exciting time for Intels Design Enablement Group. This position is within the Design Enablement (DE) organization of Technology Development (TD). At Intel, Design Enablement is one of the key pillars enabling Intel to deliver winning products in the marketplace. Your work will directly enable design teams to get to market faster with leadership products on cutting edge technologies.

As a member of DE / Definition and Modeling Team, you will be at the forefront of co-optimizing Intel's state-of-the-art process technology with diverse design needs in order to enable best-in-class products in data-centric world. Tech Definition and Modeling Team serves as the design interface with the process development team, working out key design/process interactions for all new Intel processes. You will be responsible for defining, analyzing and driving Intel's logic design rules in robust and efficient manner.

About the role:

You'll be a key part of team responsible for a range of reliability and statistical analysis solutions including transistor degradation, process variation, oxide wearout, ESD, soft-error, and reliability verification across multiple design hierarchies. You will work with EDA vendors to integrate Intel reliability/statistical analysis models within the EDA frameworks. Also, you will work closely with multiple Intel organizations and industry partners to develop and deploy solutions that support parametric variation (process/reliability) analysis across SoC/IP designs. Finally, you'll be involved in developing AI/ML, data analytics and associated automation to improve parametric variation analysis algorithms as well as PDK assessment.

This is an entry level position and compensation will be given accordingly.


You must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences.


Minimum Qualifications:
Candidate must have a MS or PhD in Electrical Engineering or Electrical and Computer Engineering.

  • 1+ years of experience in C/C++
  • 6+ months of experience in device physics, reliability analysis/modeling, robust circuit design, and/or statistical analysis.

Preferred Qualifications:
1+ years of experience with the following:

  • Scripting languages (e.g. Perl, TCL, Python)
  • Circuit simulators (e.g. HSpice, Spectre)
  • Circuit-level variation analysis (variation features in simulation tools, Solido, etc.)




Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.

Other Locations

US, Oregon, Hillsboro

Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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CAD Research and Development Eng

Santa Clara, CA 95050

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