CAD Research and Development Eng

Intel
Santa Clara, CA 95050
  • Job Code
    JR0141748
Job Description

About the team:

Now is an exciting time for Intels Design Enablement Group. This position is within the Design Enablement (DE) organization of Technology Development (TD). At Intel, Design Enablement is one of the key pillars enabling Intel to deliver winning products in the marketplace. Your work will directly enable design teams to get to market faster with leadership products on cutting edge technologies.

As a member of DE / Definition and Modeling Team, you will be at the forefront of co-optimizing Intel's state-of-the-art process technology with diverse design needs in order to enable best-in-class products in data-centric world. Tech Definition and Modeling Team serves as the design interface with the process development team, working out key design/process interactions for all new Intel processes. You will be responsible for defining, analyzing and driving Intel's logic design rules in robust and efficient manner.

About the role:

As a CAD Research and Development Engineer, you'll be involved in:

  • Create high-quality software/flows, work with multiple developers, and follow software design practices.
  • Working with Intel's technology organizations to understand and model existing and future technology features related to the interconnect.
  • Working with multiple EDA companies to co-develop extraction solutions that will be used both internally and as part of Intel's foundry program.
  • Creating new extraction techniques to address upcoming technology features not yet handled in existing industry extraction tools; and/or validating existing extraction solutions against models and measured data.
  • You will work closely with other members of the team, internal project teams, Intel's technology groups.


Qualifications

You must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences.


Minimum Qualifications:

  • MS/Ph.D. in Electrical Engineering, Physics, or similar.

  • 2+ years experience in C and/or C++.

  • 6+ months experience/university research in electromagnetics, parasitic extraction, or device physics.


Preferred Qualifications:

  • Minimum of 1 year of experience with the following:

  • Scripting languages (e.g. Perl, TCL, Python)

  • Various solvers (e.g. Raphael, HFSS, Fast Henry, Quick Cap, university-developed tools)

  • Extraction flows using popular extraction solutions (StarRC, Quantus)

  • Knowledge of popular 2D and 3D electromagnetic packages

#designenablement
@designenablemnt
#LI-JR1 

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth



Other Locations

US, Oregon, Hillsboro



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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CAD Research and Development Eng

Intel
Santa Clara, CA 95050

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