CAD Engineer - Custom Signoff Lead

Cupertino, CA 95014
  • Job Code
    200200755
Summary

Summary

Posted: Feb 16, 2021

Role Number:200200755

Do you love building elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As p...Summary

Summary

Posted: Feb 16, 2021

Role Number:200200755

Do you love building elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions! Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices.

The Signoff Engineer ensures that all necessary and appropriate verification and analysis work has been performed on a complex mixed-signal design prior to tapeout. In this highly visible role as a core team member in our advanced Signoff CAD Group, you will enhance your career working on state-of-the-art designs. You'll utilize your hands-on experience in Custom analysis to develop/define & refine the signoff methodologies for transistor level as well as gate level designs. The areas will include but are not limited to signoff of EMIR analysis, power and signal analysis, Design and Layout rules, Extraction, PDK and physical verification, and IP for reuse.

You will contribute to the definition of signoff requirements early in the project, work with other teams in the organization (Design, CAD and Technology) to verify that the EDA flows and tools are set up and run correctly during the project, and all signoff criteria are met at the end of the project. Responsibility also includes directly interfacing with design groups and providing frontline support for enablement / enhancement / debug requests.

Key Qualifications

  • Solid understanding of circuit design principles
  • Experience in process technologies, layout, and design rules
  • Experience in verifying PDK and foundry collateral
  • Experience in debugging design issues and LVS trouble shooting
  • Experience in simulating and verifying circuits
  • Experience in EMIR analysis
  • Methodology for transistor and gate level analysis
  • Strong understanding of CAD flows
  • Proficiency in programming/scripting languages (Perl / Python / TCL)
  • Excellent communication skills and ability to collaborate

Description
- Determine signoff criteria; work with technology and design teams
- Participate in technology and design reviews
- Develop and maintain signoff checks
- Verify CAD flows are generating correct results (flow signoff)
- Evaluate designs for signoff
- Drive signoff reviews with design teams
- Enablement of design teams on signoff infrastructure including page generation, build list maintenance, and enhancement request tracking
- Signature file creation and management and delegation of signature responsibility
- Milestone and signoff scheduling. Signature tracking
- Ability to work in a demanding, collaborative environment

Education & Experience

MSEE with 7+ years of experience or BSEE with 10+ years of experience.

Additional Requirements

Before you go...

Our free job seeker tools include alerts for new jobs, saving your favorites, optimized job matching, and more! Just enter your email below.

Share this job:

CAD Engineer - Custom Signoff Lead

Apple, Inc.
Cupertino, CA 95014

Join us to start saving your Favorite Jobs!

Sign In Create Account