ATTD Package Architect

Phoenix, AZ 85003
  • Job Code
Job Description

About the Group:

Technology Development (TD) is the heart and soul of Moores Law at Intel. TD has enabled Intel to create world-changing technology that enriches the lives of every person on earth. TDs more than 10,000 employees drive breakthrough research, develop next generation process and packaging technologies, while also running high volume manufacturing operations in its state-of-the-art facilities in Oregon and Arizona.
TD has helped Intel advance from the early days of semiconductor technology to the latest technologies that can pack more than 100 million transistors on a square millimeter of silicon. The process and packaging technology that TD develops is then transferred to Intels global network of semiconductor fabrication, assembly and test plants.

About the role:

We're looking for a motivated, passionate, and talented IC Packaging Architect to join Intel's Advanced Design Technology and Solutions (ADTS) group within Assembly Test Technology Development (ATTD) to realize Intel's IDM 2.0 vision with advanced packaging technologies. Working with a cross functional team including silicon IP design, package and PCB platform to define and co-optimize package solutions, this position determines creative design approaches and solutions based on formal education and judgement, works with the design and layout teams to implement those solutions.


  •  Define Package Architecture across Intel's product portfolios (CPUs, Chipsets, SOC designs and more) as part of the Assembly and Test Technology Development group. 
  • Work with the Si and Board design teams to define and implement a co-design strategy which would optimize product performance and cost at the package and system level. 
  • Work closely with Intel and external customers on advanced design nodes to establish design flows for advanced package architectures.
  • Direct technical aspects of the Package Architecture process including conducting early route studies, creation of specifications, providing guidance for electrical analysis and supervision of production layouts. 
  • Collaborate with EDA partners on advancing package design tools and identify most efficient design methods and will serve as the technical expert on advanced package architectures and design tools as well as consult on design and implementation issues.


  • Solid background in semiconductor fabrication and packaging, 
  • Understanding of packaging technology development FMEAs and product packaging requirements - both physical and electrical. 
  • Strong technical background in both design and electrical analysis. 
  • Technical understanding in the areas of Si +Package and Board interaction
  • Experience and knowledge with assembly process, test and characterization techniques would be an added advantage.
  • Experience with design and electromagnetic simulation tools: Mentor, Cadence tools, SPICE, Ansys tools etc.
  • Experience in Cadence Allegro platform tools (PCB Editor, Advanced Package Designer, APD/SiP, Concept HDL, Sigrity), and/or Mentor Xpedition platform tools (PCB Layout/XPD, Designer, Hyperlynx).

The ideal candidate should also exhibit the following behavioral traits:

  • Strong analytical ability and problem solving skills like: identifying, isolating, and debugging issues and providing creative solutions.
  • Ability to work independently and at various levels of abstraction.
  • Strong organization, time management, and communication skills, self-motivated.


  • Ph.D./Master's in electrical, chemical or mechanical Engineering, Material Science or related field.
  • 10+ years and in-depth knowledge/background in Package, PCB design, or IC digital design.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth

Other Locations

US, California, Santa Clara;US, Oregon, Hillsboro

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter....

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ATTD Package Architect

Phoenix, AZ 85003

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