ASIC Design Engineer

San Diego, CA 92101
  • Job Code
Job Description

As an ASIC Design Engineer you will join the Programmable Solutions Group (PSG) within the DCG division and become part of the VLSI design team to develop digital IPs used in Intel's family of wireless communications SoC.

In this role, you will be responsible for the integration and driving validation, quality check of several hardware accelerators as part of the PHY processing of the LTE and 5G wireless protocol stack. You will also define module interfaces/formats for simulation, perform Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs.


You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.


Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Minimum Qualifications

5+ years of total experience including experience with micro architecture, RTL coding for high performance, low power design

Preferred Qualifications

  • 10+ years of total experience including experience with ASIC design flow

  • Experience Developing Specification for the SoC, RTL coding, UPF generation, Top level integration and support DFT implementation.

  • Experience with industry tool flow to run quality checks before releasing RTL codes to physical implementation (Lint, CDC, FEV, Caliber, DFT, Synthesis, PrimeTime).

  • Experience working with the Physical design team to optimize timing, area, test coverages.

  • Experience with high performance and lower power ASIC design techniques in advance CMOS nodes

  • Masters Degree in Electrical Engineering or related field

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Other Locations

US, California, Folsom;US, California, San Jose;US, California, Santa Clara

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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ASIC Design Engineer

San Diego, CA 92101

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