ASIC Application Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0177032
Job Description

If you have a strong technical background and like customer interaction, this is the position for you. Intel Foundry Services (IFS) is looking for candidates with strong technical skills in ASIC/SOC/IP design and methodology to work with our customers. The selected candidate, will drive IFS technologies into customers engineering teams as well as be the customer advocate back into Intel Technology and Design Kit teams

Responsibilities may include:

  • Technical support of customer accounts participating in customer project life cycle
  • preparing and delivering technical training presentations and supporting presales/postsales activities
  • Provide ongoing support on PPA and ASIC Design issues related to Foundry collaterals and reference flows
  • Provide expert - level support to customer designs on ASIC techfile and methodology
  • Create or review content and drive quality of design kits and documentation going to customers
  • Knock down all barriers to successful customer testchip and product tapeins


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Qualifications listed as preferred or additional will be considered a plus factor for applicants.

Minimum Qualifications

  • The candidate must possess at least one of the 2 following degrees + the years of experience determined for each degree in the areas of expertise specified below: 

1 - Bachelors degree in Electrical Engineering or related field of study with 9+years of experience in the Semiconductor industry and Design Automation related field.

2 - Masters degree in Electrical Engineering or related field of study with 6+ of experience in the Semiconductor industry and Design Automation related field.

5 years of experience in one or more of the following areas:

  • ASIC Design
  • PPA(Power Performance Area) Analysis
  • Timing Closure
  • Design Flow Enablement
  • Synthesis Place and Route Timing Extraction Layout verification
  • Preferred qualifications:
  • Proficiency in scripting languages such as Tcl, Python and Perl.
  • Proficiency with Industry standard ASIC tools - ICC2, Innovus, PT, Tempus, Redhawk, etc.
  • Demonstrated depth in SOC design methodology, SOC Integration, IP development.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.



Other Locations

US, Arizona, Phoenix;US, California, Folsom;US, Oregon, Hillsboro;US, Texas, Austin



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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ASIC Application Engineer

Intel
Santa Clara, CA 95050

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