Analog/Mixed Signal Circuit Design Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0199084
Job Description

We are looking for a highly motivated Analog/Mixed Signal Design Engineer to join the Circuit Development Team for Intel's next generation of chipsets/SOC. As part of the team, you will be working across different groups within the corporation: Architecture, Technology Development, IP Designers, and Package and Platform Engineers to develop custom circuit solutions on Intel's next generation process.

Responsibilities of this role include, but are not limited to:

  • Design custom clocking circuitry (DLL, PLL, CRO)
  • Design Low Power Crystal Oscillators
  • Design of unique IO circuits
  • Design of power delivery circuits (VRs, Power Gates, Voltage monitors)
  • Research and develop techniques to minimize Hard IP power consumption
  • Working with HVM/EV to debug any critical post-Si issues


Behavioral Traits:

  • Technical leadership with good communication, interpersonal and problem-solving skills
  • Motivated, self-directed and skilled at working effectively both independently and as a team
  • Collaborative skills to work across the organization to achieve goals and thrive in a team-oriented environment


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly.

Minimum Qualifications:

The candidate must have a Master's degree in Electrical/Computer Engineering - OR - a PhD in Electrical/Computer Engineering.

6+ months of experience in:

  • Analog/Mixed Signal circuit design: PLLs, band gap reference, voltage and current monitors, process monitors, HSIO
  • Design of on-die power delivery circuits: voltage regulators, power gates, band gap reference, voltage and current monitors
  • IO/Platform signal integrity
  • Post-silicon debugging on analog circuits

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Analog/Mixed Signal Circuit Design Engineer

Intel
Santa Clara, CA 95050

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