Analog Engineer

Intel
Folsom, CA 95630
  • Job Code
    JR0201176
Job Description

The world is transforming and so is Intel!  Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower peoples digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, Come join us to do something wonderful!

This position is for an Analog/Mixed Signal and Circuit Design Engineer in the IP Engineering Group IPG responsible for design and development of DDR PHY IPs for Intel products across multiple segments including Client and Data Center

We are seeking an individual who has deep technical knowledge and expertise in analog mixed signal IP Circuit Design and Validation Knowledge of memory interfaces desired
The candidate must be able to interact effectively with cross functional design engineer leads as well as communicate effectively with management customer and peers, In addition be self motivated with the initiative to seek constant improvements in SOC architecture knowledge integration and design methodologies
The candidate must also possess strong initiative analytical problem solving skills and the ability to work in a diverse team environment

Key Responsibilities include but are not limited to:

  • Design of mixed signal circuits such as High Speed Transmitters and Receivers equalization circuitry DLL Clock distribution from logic to analog domain on die voltage regulators.
  • Circuit Compensation Blocks and Voltage reference blocks to meet architectural specifications
  • Creating design verification plans covering functionality performance and reliability for high volume manufacturability
  • Participating in circuit design reviews Working with Mask Designers on layout implementation and reviews
  • Collaborating with design engineers of other disciplines on integration of the analog circuit into the DDR PHY


Qualifications

Candidate must possess a Bachelors of Electrical Engineering, Computer Engineering, Computer Science, or a related field with 3+ years experience OR a Masters of Electrical Engineering, Computer Engineering, Computer Science, or a related field with 3+ months experience with:

NOTE: This position is not eligible for employment-based visa/immigration sponsorship for those with a Bachelors degree and less than 3 years of experience. Intel sponsors individuals for employment-based visas for positions where we experience a shortage of US Workers. These skills shortage roles are typically STEM contributing positions requiring a Master's or PhD degree, or a Bachelors degree with three years related job experience. This position is not eligible for employment-based visa/immigration sponsorship for those with a Bachelors degree and less than 3 years of experience. Intel sponsors individuals for employment-based visas for positions where we experience a shortage of US Workers. These skills shortage roles are typically STEM contributing positions requiring a Master's or PhD degree, or a Bachelors degree with three years related job experience.

Minimum Qualifications:

  • Design of high speed analog and mixed signal design
  • Understanding of design for yield and exposure to production challenges in latest technology process node
  • Experience with industry standard tools for Analog design such as Cadence ADE Spectre AMS verification FEV Star RC etc
  • Cross discipline knowledge in areas such as Analog integration

Preferred Qualifications:

  • RTL System Verilog
  • Static timing analysis concepts
  • APR Floor planning
  • Metal routing Power grid
  • Memory IO training
  • MRC and HAS/MAS specification documentation
  • Strong written and oral communication skills
     

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.



Other Locations

US, California, Santa Clara;US, Oregon, Hillsboro


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Analog Engineer

Intel
Folsom, CA 95630

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