Analog Design Engineer

Phoenix, AZ 85003
  • Job Code
Job Description

We are seeking for an expert Analog Designer to join our excellent design team. In this role you will have a chance to define, design, implement and verify analog and mixed signal circuits, like LDOs, ADCs/DACs, OPAMPs, comparators, CML designs for CTLE, drivers for clocking in Tx, etc. You will be developing designs to support high-speed, low-power wireline transceiver Phys for some of Intel's highest-volume product lines.

Responsibilities will include but not limited to:

  • Involve in circuits for high-speed I/O design Take full responsibility of a design from bottom to top
  • Work closely with mask design engineers to optimize design performance at circuit and full-chip level
  • Propose and implement creative design approaches
  • Document and review the achieved results
  • Work closely and collaborate within a team with expert analog designers and experienced layout designers
  • Motivation for continuous skill-development in high-speed/Analog/Mixed signal design
  • Being a team player, able to work in a group, having a desire to mentor other designers


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

The candidate must have a Bachelor's degree in Electrical/Computer Engineering, Computer Science or a related field and 4+ years of experience -OR- a Master's degree in Electrical/Computer Engineering, Computer Science or a related field and 3+ years of experience -OR- a PhD degree in Electrical/Computer Engineering, Computer Science or a related field and 1+ years of experience in the following:

  • Designing, testing and validating analog and/or mixed signal circuits with sub-micron CMOS technology
  • VLSI and industry standard CAD tools for schematic capture, simulation, layout and physical verification, such as Cadence Spectre/Maestro/Finesim/AMS Designer /Virtuoso
  • High-speed Analog IO designs, PHY architectures, and trade-offs
  • Deep sub-micron device physics, process technology and manufacturing
  • Analog layout techniques, including floor-planning, matching, shielding and parasitic optimization

Preferred Qualifications:

  • Familiarity with Verilog RTL coding

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.

Other Locations

US, California, Folsom;US, California, Santa Clara

Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Analog Design Engineer

Phoenix, AZ 85003

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