3D-IC STCO Senior Architect/RTL Logic Designer

Hillsboro, OR 97123
  • Job Code
Job Description

The Design Technology Pathfinding (DTP) organization in Design Enabling (DE) is chartered to identify and drive key strategic initiatives in the pathfinding of technologies as a holistic co-optimization across the Product Stack from System architecture to silicon as we extend Design Technology Co-Optimization (DTCO) to System Technology Co-Optimization (STCO). The job requires partnering and leveraging domain experts across Intel's Eco-System

Your responsibilities may include, but not be limited to:

  • Evaluating new 3D Arch requirements.
  • Advanced RISC Machines (ARM) IP configuration
  • Identify 3D architecture configurations and die partition for best PPA
  • RTL coding Verilog system Verilog logic simulation synthesis and timing analysis
  • Validate design and micro-architectural implementation and assumptions
  • Use case analysis Performance and Power optimizations explorations and analysis
  • Participate in Silicon debug

Important behavior attributes:

  • Analytical and problem-solving skills
  • Verbal/written communication skills
  • Effective team player with continuous learning mindset


Minimum Qualifications:

Bachelor's in Electrical, Computer Engineering with 6+ years of work experience OR Master's in Electrical, Computer Engineering with 4+ years of work experience.

Direct hands-on experience in the following areas:

  • ARM-based Systems
  • Logic/RTL design using System Verilog
  • Simulation and debug experience using Verilog Compiler Simulator (VCS), Verdi - Synopys
  • Synthesis and speed path debug
  • Low-power design and Multiple clock domain design

Preferred Qualifications:

  • Micro-architecture trade-offs and documentation
  • Design for Test (DFT) and Design for Debug (DFD)
  • Pre-silicon and post-silicon validation


Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.

Other Locations

US, California, Irvine

Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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3D-IC STCO Senior Architect/RTL Logic Designer

Hillsboro, OR 97123

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